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Leti 3D Takes Advantage of Active Inter-poser


On July 15th, 2016 Steve Bush wrote an article on Electronics Weekly talking about how the French semiconductor Leti is working with their research development team in order to create a 3D network chip to improve fast computing. The reason behind this is so that data and be transferred between stacked die. Another way to transfer is across die on the silicon inter-poser. Not only this is very effective for the company but it is also not too costly.

Here is what Denis Dutoit, the Leti strategic marketing manager has to say about the 3D network on chip.

The steady rise in the number of applications that require high-performance computing creates a demand for new hardware-plus-software communications solutions that improve both performance and energy consumption. This technology brick makes it possible to transfer data between processors via a network-on-chip delivering more powerful, energy-efficient computing.

To understand more about the 3D circuits, they combine identical 28nm die, also known as chip-lets to Leti, fabricated on a FDSOI process. FDSOI is short hand for fully depleted silicon on insulator.

Here is what Leti has to say about the details of this:

The active interposer embeds several lower-cost functions, such as communication through the NoC and system I/Os, power conversion, design for testability and integrated passive components.

To learn a little more about 3D integration, here is what Leti has to say about the idea.

3D integration in electronical components is when a device has at least active layers have been vertically integrated in order to achieve a new component or a system. Those layers could be homogeneous or heterogeneous in term of component function, material, substrate sizes or technological node.


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