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SiFive to Release Their Newest SoC to Public

SiFive known as RISC-V pioneer has released their newest innovative SoC (system on a chip) to enhance combination of systems. The latest SoC is formed on the similar base of the original RISC-V design but has been modified for greater capacity. The manufacture of the SoC is the Taiwan Semiconductor Manufacturing Company (TSMC) that was built on a 180-nm process. Some of the main applications that the SoC can be incorporated into are microcontrollers, embedded, loT and wearable applications. The FE310 is equipped with the latest SiFive technology such as the E31 CPU Corplex, which holds a 32 bit RV32IMAC core that is able to perform at a 320MHz speed. The SoC is also equipped with

“16kbyte L1 instruction cache, a 16kbyte data SRAM scratchpad, hardware multiply/divide, debug module and an OTP nonvolatile memory. Peripherals include UARTs, QSPI, PWMs and timers”

Post to announcing the Chip SiFive shortly released the FE310 RTL code to the public to allow designers to be able to tamper with it and create their own SoC which would work hand in hand with the base FE310. By making it open to the public it made it apart of the Freedom Everywhere family of customizable SoCs.

Previously stated by the executive director of the nonprofit RISC Foundation, Rick O’Connor,

"We are thrilled to see the first commercial silicon based on RISC-V standards come to market and look forward to continued technology leadership from the SiFive team.”
SiFive is the first "Fabless"  provider of unique semiconductors.  Fabless is a term used to outsource the manufacturing of silicon wafers that are incorporated in most semiconductor production to date. Companies that use fabless structures are able to focus more time on their design of their circuits and possibly reduce labor within the company.


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